Academic Year/course:
2023/24
634 - Joint Programme in Computer Engineering - Business Administration
39809 - Computer architecture and organisation I
Syllabus Information
Academic year:
2023/24
Subject:
39809 - Computer architecture and organisation I
Faculty / School:
326 - Escuela Universitaria Politécnica de Teruel
Degree:
634 - Joint Programme in Computer Engineering - Business Administration
ECTS:
6.0
Year:
1
Semester:
Second semester
Subject type:
Basic Education
Module:
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1. General information
This introductory subject aims to enable each student to understand a machine language architecture and design assembly language programs capable of communicating with peripherals. The use case of the subject will be the architecture: ARMv4T
This subject belongs to the basic subjects of Computer Architecture in the Computer Engineering Degree. The subject links to Introduction to Computers and is required to take Architecture and Organization 2. To take this subject it is a prerequisite to have taken the subject Introduction to Computers.
This subject does not explicitly work on or evaluate any of the Sustainable Development Goals (SDGs) included in the 2030 Agenda https://www.un.org/sustainabledevelopment/es/).
2. Learning results
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Know at a basic level the parameters that define the machine language architecture (repertoire, instruction format and coding, stores, data types, addressing modes, control of sequencing and control transfers, exception handling).
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Know and be able to handle the machine language architecture of a reference processor.
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Distinguish the concepts of machine and assembly language.
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Know the methods of representation and codification of information and its basic operations. Be capable of translating data structures and control from high-level languages to assembly.
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Use subroutine calls.
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Know how to integrate assembly code and library routines into programs written in high-level languages.
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Understand the generic register model of a peripheral device driver and the basic methods of synchronization and transfer. Program any simple I/O device and know how to handle exceptions.
3. Syllabus
The program to be developed in this subject consists of the following blocks or topics that are taught in the following order:
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Processor Architecture: Interpretation and translation, machine and assembly language, development environment, information representation and coding, basic operations, stores, addressing modes, instruction repertoire, data structure translation and high-level language control.
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Subroutines: Calls to subroutines. Activation block. Case study. High-level code integration with assembly code and library routines.
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I/O subsystem: Generic model of device driver registers. Basic synchronization and transfer methods. Exceptions. Integration of peripherals in microcontrollers.
4. Academic activities
The teaching organization of the subject is as follows:
- Theoretical classes (2 hours per week)
- Problem classes (1 hour per week)
- Practical laboratory classes (1 hour per week)
- Tutorials and assessment activities
The schedules of all classes and the dates of the practical sessions will be announced well in advance through the webs of the center and of the subject.
Student work
The student's dedication to achieve the learning results in this subject is estimated in 150 hours, distributed as follows:
- approximately 56 hours of face-to-face activities (theory classes, problems and laboratory practice)
- 51 hours of effective personal study (study of notes and texts, problem solving, class and practical preparation, program development)
- 40 hours of team programming work
- 3 hours of final written exam
The schedule of exams and the dates for submission of evaluation papers will be announced well in advance.
5. Assessment system
Written exam divided in two parts, one part of theory and questions and the other part of assembly programming.